72 research outputs found
A Low-Power Two-Digit Multi-dimensional Logarithmic Number System Filterbank Architecture for a Digital Hearing Aid
This paper addresses the implementation of a filterbank for digital hearing aids using a multi-dimensional logarithmic number system (MDLNS). The MDLNS, which has similar properties to the classical logarithmic number system (LNS), provides more degrees of freedom than the LNS by virtue of having two, or more, orthogonal bases and the ability to use multiple MDLNS components or digits. The logarithmic properties of the MDLNS also allow for reduced complexity multiplication and large dynamic range, and a multiple-digit MDLNS provides a considerable reduction in hardware complexity compared to a conventional LNS approach. We discuss an improved design for a two-digit 2D MDLNS filterbank implementation which reduces power and area by over two times compared to the original design
VLSI Watermark Implementations and Applications
This paper presents an up to date review of digital watermarking (WM) from a VLSI designer point of
view. The reader is introduced to basic principles and terms in the field of image watermarking. It goes through a
brief survey on WM theory, laying out common classification criterions and discussing important design
considerations and trade-offs. Elementary WM properties such as robustness, computational complexity and their
influence on image quality are discussed. Common attacks and testing benchmarks are also briefly mentioned. It
is shown that WM design must take the intended application into account. The difference between software and
hardware implementations is explained through the introduction of a general scheme of a WM system and two
examples from previous works. A versatile methodology to aid in a reliable and modular design process is
suggested. Relating to mixed-signal VLSI design and testing, the proposed methodology allows an efficient
development of a CMOS image sensor with WM capabilities
Hardware Implementations of Video Watermarking
Various digital watermarking (WM) techniques for still imaging have been studied in the last several
years. Recently, many new WM schemes have been proposed for other types of digital multimedia data, such as
text, audio and video. This paper presents a brief overview of existing digital video WM. We classify WM
techniques and discuss the properties of video WM. Since each WM application has its own specific
requirements, WM design must take the intended application into consideration. Video WM applications are also
discussed in the paper. The features of video WM implementations in software and hardware and their
differences are presented through the description of four examples of existing work
Profiting from an inefficient association football gambling market: Prediction, risk and uncertainty using Bayesian networks
AbstractWe present a Bayesian network (BN) model for forecasting Association Football match outcomes. Both objective and subjective information are considered for prediction, and we demonstrate how probabilities transform at each level of model component, whereby predictive distributions follow hierarchical levels of Bayesian inference. The model was used to generate forecasts for each match of the 2011/2012 English Premier League (EPL) season, and forecasts were published online prior to the start of each match. Profitability, risk and uncertainty are evaluated by considering various unit-based betting procedures against published market odds. Compared to a previously published successful BN model, the model presented in this paper is less complex and is able to generate even more profitable returns
Fault-Tolerant Computations over Replicated Finite Rings
International audienceThis paper presents a fault-tolerant technique based on the modulus replication residue number system (MRRNS) which allows for modular arithmetic computations over identical channels. In this system, fault tolerance is provided by adding extra computational channels that can be used to redundantly compute the mapped output. An algebraic technique is used to determine the error position in the mapped outputs and provide corrections. We also show that by taking advantage of some elementary polynomial properties we obtain the same level of fault tolerance with about a 30% decrease in the number of channels. This new system is referred to as the symmetric MRRNS (SMRRNS)
Fermat Primes. High Throughput VLSI DSP Using Replicated Finite Rings
This paper discusses recently introduced strategies in implementing DSP systems using residue replication; in particular we highlight current work underway in the VLSI Research Group, at the University of Windsor, in the area of constructing high throughput DSP systems on silicon. The paper first briefly reviews the theory and mapping techniques, associated with general residue and residue replication systems, then discusses the detailed VLSI design of an efficient general coefficient inner product step processor using Fermat Primes. High Throughput VLSI DSP Using Replicated Finite Rings
Parallel Montgomery Multiplication in GF(2 k ) Using Trinomial Residue Arithmetic
We propose the first general multiplication algorithm in GF(2 k) with a subquadratic area complexity of O(k 8/5) = O(k 1.6). Using the Chinese Remainder Theorem, we represent the elements of GF(2 k); i.e. the polynomials in GF(2)[X] of degree at most k − 1, by their remainder modulo a set of n pairwise prime trinomials, T1,..., Tn, of degree d and such that nd ≥ k. Our algorithm is based on Montgomery’s multiplication applied to the ring formed by the direct product of the trinomials
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